A Modified Technique for Reducing the Micro instructions of Synchronous Digital Systems

Authors

Mohammed Al-Dahle, Philadelphia UniversityFollow
Nasser Halasa, Al-Ahliyya Amman UniversityFollow

Abstract

Micro-Programmed Logic Devices have been studied in several Approaches. Several types of addressing have been used as Compulsory, combined and natural addressing. In this paper, a modified technique to synthesize the Algorithm is utilized State Machines (ASM) for synchronous digital systems using combined addressing is presented, based on dividing the Microinstruction into subsets, which results in minimizing the number of microinstructions and decreases the throughout time of the automation.

Recommended Citation

Al-Dahle, Mohammed and Halasa, Nasser (2020) "A Modified Technique for Reducing the Micro instructions of Synchronous Digital Systems," Al-Balqa Journal for Research and Studies البلقاء للبحوث والدراسات: Vol. 9: Iss. 2, Article 5.
Available at: https://digitalcommons.aaru.edu.jo/albalqa/vol9/iss2/5